1. Technical Field
The present invention relates to a method of manufacturing a semiconductor device with a dual damascene structure.
2. Related Art
There has been known a dual damascene process by which an interconnection trench and a via hole are formed in an insulating interlayer, and a metal layer is buried in the interconnection trench and the via hole at the same time to form multilayer interconnection. A process has been described as the dual damascene process in, for example, Japanese Laid-Open patent publication NO. H11-163143. The dual damascene process described in the above publication is shown in FIGS. 7A to 7D
In the first place, a hard mask 114 with an interconnection pattern is formed on an insulating film 112 formed on a substrate 110. Subsequently, a resist film is formed in such a way that the resist film covers the hard mask 114. Then, a resist film 116 with a via pattern is formed by etching the resist film. This via pattern is formed in the interconnection pattern (FIG. 7A). Subsequently, the resist film 116 is etched as a mask to form a via pattern 118 in the insulating film 112 (FIG. 7B). After the via pattern 118 is formed, the resist film 116 is removed for further etching. Thereby, a via hole 120 reaching an electrically conducting layer 111 formed on the substrate 110 is formed. In this case, an interconnection trench 122 is formed in the upper portion of the via hole 120 (FIG. 7C). The interconnection trench 122 is formed, and the hard mask 114 is removed to form the dual damascene structure.
In this dual damascene process disclosed in Japanese Laid-Open Patent Application Publication No. H11-163143, a mask pattern for self-alignment is formed just above the insulating film 112 with the hard mask 114 and the resist film 116. However, it has been difficult to form a fine interconnection structure, because accurate patterning and etching can not be realized when the hard mask 114 with this interconnection pattern is formed, and removed. Accordingly, a dual damascene process by which a fine interconnection structure can be formed has been required.